Table of Contents

Introduction
What is an FPGA?
Digital and analog signal processing
FPGA costs
FPGA versus ASIC

Understanding FPGA Resources
General-purpose resources
Special-purpose resources
The company- or family-specific resources

Several Principles and Methods of Resource Usage Control
Reusing silicon resources by process sequencing
Finding algorithms with less computation
Using dedicated resources
Minimizing supporting resources
Remaining in control of the compilers
Guideline on pipeline staging
Using good libraries

Examples of an FPGA in Daily Design Jobs
LED illumination
Simple sequence control with counters
Histogram booking
Temperature digitization of TMP03/04 devices
Silicon serial number (DS2401) readout

The ADC + FPGA Structure
Preparing signals for the ADC
Topics on averages
Simple digital filters
Simple data compression schemes

Examples of FPGA in Front-End Electronics
TDC in an FPGA based on multiple-phase clocks
TDC in an FPGA based on delay chains
Common timing reference distribution
ADC implemented with an FPGA
DAC implemented with an FPGA
Zero-suppression and time stamp assignment
Pipeline versus FIFO
Clock-command combined carrier coding (C5)
Parasitic event building
Digital phase follower
Multichannel deserialization

Examples of an FPGA in Advanced Trigger Systems
Trigger primitive creation
Unrolling nested-loops, doublet finding
Unrolling nested-loops, triplet finding
Track fitter

Examples of an FPGA Computation
Pedestal and RMS
Centre of gravity method of pulse time calculation
Lookup table usage
The enclosed loop microsequencer (ELMS)

Radiation Issues
Radiation effects
FPGA applications with radiation issues
SEE rates
Special advantages and vulnerability of FPGAs in space
Mitigation of SEU

Time-over-Threshold: The Embedded Particle-Tracking Silicon Microscope (EPTSM)
EPTSM system
Time-over-threshold (TOT): analog ASIC PMFE
Parallel-to-serial conversion
FPGA function

Appendix

Index

References appear at the end of each chapter.

About the Author

Hartmut F.-W. Sadrozinski is a research physicist and adjunct professor at the University of California, Santa Cruz. A senior fellow of the IEEE, Dr. Sadrozinski has been working on the application of silicon sensors and front-end electronics in elementary particle physics and astrophysics for over 30 years. He is currently involved in the use of silicon sensors to support hadron therapy. He earned his Ph.D. from the Massachusetts Institute of Technology. Jinyuan Wu is an electronics engineer in the Particle Physics Division of Fermi National Accelerator Laboratory. Dr. Wu is a frequent lecturer at international workshops and IEEE conferences. He earned his Ph.D. in experimental high energy physics from Pennsylvania State University.